New PDF release: Analog Circuit Design: High-Speed A-D Converters, Automotive

By Arthur H.M. van Roermund, Herman Casier, Michiel Steyaert

ISBN-10: 9048173027

ISBN-13: 9789048173020

Analog Circuit layout comprises in overall 18 tutorials. They replicate the contributions of 6 specialists in all the 3 fields coated by means of the 3 chapters pointed out within the subtitle, as awarded on the fifteenth workshop on Advances in Analog Circuit layout (AACD) held in Maastricht, April 2006.

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Additional resources for Analog Circuit Design: High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless

Example text

This means, that the comparator can be run at lower current levels to achieve the same net speed. In pipelined converters there are even more options available. The most power hungry part there is the MDAC. Here the most efficient and simplest way to save power is via stage scaling. That is that later stages are designed with smaller capacitors and less OP-amp current due to relaxed accuracy requirements. Also the dedicated input sample and hold can be eliminated. This function can be taken over by the sample and hold present in the first stage.

Although the static offset is cancelled there still remains a dynamic part coming from charge injection and parasitic couplings. 36 D. Draxelmayr and P. Bogner Therefore the dominant error terms are given by offset and non-linearity (caused by element mismatch). Fundamentally, there are three speed-limiting blocks in this circuit: the comparator, the logic (SAR) and the capacitive network. The speed of the logic can be improved by optimizing the SAR towards minimum delay. The speed of the capacitive network is given by the RC time constants.

34, no. 5, pp. 599-606, May 1999. B. Murmann, B. E. Boser: “A 12b 75MS/s Pipeline Adc Using OpenLoop Residue Amplification”, ISSCC 2003, pp. 328-329. 52 [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] D. Draxelmayr and P. Bogner G. : “A high performance CMOS A/D Converter for a digital camcorder system”, IEEE Transactions on consumer electronics, August 1996, Volume 42, Number 3, pp. 285-289. M. Yoshioka, M. Kudo, K. Gotoh, Y. 18um CMOS” ISSCC Dig. Tech.

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Analog Circuit Design: High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless by Arthur H.M. van Roermund, Herman Casier, Michiel Steyaert

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